The Twelfth International Workshop on
Accelerators and Hybrid Emerging Systems

To be held in conjunction with
36th IEEE International Parallel and Distributed Processing Symposium
Virtual Event (May 30-June 3, 2022)

Opening Statement

2:15 pm - 2:30 pm CEST

Lena Oden, FernUni Hagen

Keynote (2:30 pm CEST)

The Modular Supercomputing Architecture (MSA)

Estela Suarez, Jülich Supercomputing Centre (JSC)

Abstract: Prof. Dr. Estela Suarez The Modular Supercomputing Architecture (MSA) is a system design that orchestrates heterogeneous computer resources (CPUs, GPUs, many-core accelerators, disruptive technologies, etc.) at system-level, organizing them in compute modules. Modules are clusters of potentially large size, each configured with a specific type of user requirement in mind. The different modules are interconnected via a high-speed network, and a common software stack brings all modules together creating a unique machine. The MSA aims at supporting a large diversity of applications and has been developed at the Jülich Supercomputing Centre (JSC) through the EU-funded DEEP projects.

Bio: Prof. Dr. Estela Suarez is Team Leader at the Jülich Supercomputing Centre (JSC) and Professor at University of Bonn. Her field of research is in HPC system-level architectures including heterogeneous computing resources, such as the Cluster-Booster and the Modular Supercomputing Architectures. She leads the DEEP series of EU-funded R&D projects and the co-design and validation Stream in the European Processor Initiative (EPI). Her background is in Astrophysics (Master from University Complutense of Madrid) and she holds a PhD in Physics from the University of Geneva.

Session One: GPU Computing

3:00 pm - 4:00 pm CEST

Session Chair: Simon Garcia de Gonzalo, Barcelona Supercomputing Center (BSC)

  • Performance Analysis of Parallel FFT on Large Multi-GPU Systems
    Alan Ayala, Stanimire Tomov, Miroslav Stoyanov, Azzam Haidar, Jack Dongarra
  • Heterogeneous GPU and FPGA computing: a VexCL case-study
    Tristan Laan, Ana Lucia Varbanescu

Break 4:00 pm - 4:30 pm CEST

Session Two: Accelerator Offloading with OpenMP

4:30 pm - 5:30 pm CEST

Session Chair: Shintaro Iwasaki, Meta AI

  • COMPOFF: A Compiler Cost model using Machine Learning to predict the Cost of OpenMP Offloading
    Alok Mishra, Smeet Chheda, Carlos Soto, Abid Malik, Meifeng Lin, Barbara Chapman
  • A Novel Set of Directives for Multi-device Programming with OpenMP
    Raul Torres, Roger Ferrer, Xavier Teruel